In many present day DRAM applications or in systems incorporating a DRAM, maximizing system performance is a significant consideration. Certain time constraints and delays in retrieving data from the system DRAM can affect overall system performance. Even very small time segments can affect performance. For example, during a read operation data is typically presented on data pads to be clocked out of the system memory for only a short period of time. As such, the clocking out of that data must occur within that short window of time during which it is presented, or there can be a failure. For this and other reasons, a need exists for the present invention.